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ÌìÃÀ´«Ã½ Announces Industry¡¯s First 112G 5nm SerDes Solution for Scaling Cloud Data Center Infrastructure

Enabling the Next Generation of High-Performance, Power-Optimized Switching, Compute and Acceleration Silicon Solutions

SANTA CLARA, Calif.¡ªNovember 17, 2020¡ªÌìÃÀ´«Ã½ (NASDAQ: MRVL) today unveiled the industry¡¯s first 112G 5nm SerDes solution that has been validated in hardware. The DSP-based SerDes boasts industry-leading performance, power and area, helping to propel 112G as the interconnect of choice for next generation 5G, enterprise, and cloud data center infrastructure. ÌìÃÀ´«Ã½ has recently secured a new custom ASIC design win customer that will embed this new IP to build next generation top-of-rack (ToR) and spine switches for leading hyperscale data centers around the world. The ÌìÃÀ´«Ã½ 5nm SerDes solution doubles the bandwidth of current systems based on 56G while enabling the deployment of 112G I/Os in many exciting new applications, including network and data center switching, network traffic management, machine learning training and inference, and application-specific accelerators.

Today¡¯s news, which comes on the heels of the company¡¯s announcement with TSMC of its 5nm portfolio, further strengthens ÌìÃÀ´«Ã½¡¯s leading data infrastructure offerings in the industry¡¯s most advanced process geometry. The 112G 5nm SerDes solution is part of ÌìÃÀ´«Ã½¡¯s industry-leading IP portfolio that addresses the full spectrum of infrastructure requirements and includes processor subsystems, encryption engines, system-on-chip fabrics, chip-to-chip interconnects, and a variety of physical layer interfaces.

ÌìÃÀ´«Ã½¡¯s 112G 5nm SerDes offers breakthrough performance with the ability to operate at 112G PAM4 across channels with >40dB insertion loss, providing margin that is critical for high reliability infrastructure applications. The solution also delivers power reduction of more than 25% compared to 7nm, enabling systems with tight thermal/power constraints and helping to drive down total cost of ownership. The power reduction of ÌìÃÀ´«Ã½'s high-speed SerDes enables scale up of bandwidth within acutely constrained 5G applications.

ÌìÃÀ´«Ã½ will offer a complete product suite of PHYs, switches, data processor units (DPUs), custom server processors, controllers, accelerators and custom ASICs in 5nm, delivering end-to-end interoperable infrastructure solutions. This interoperability between ÌìÃÀ´«Ã½ components will allow customers to significantly reduce their product development and validation cycle time, and time-to-market.

For ÌìÃÀ´«Ã½¡¯s ASIC customers, this IP further enhances the industry¡¯s most comprehensive offering for leading-edge custom solutions. The ÌìÃÀ´«Ã½ ASIC business unit is engaged with customers across multiple markets looking to take advantage of this first-to-market proven silicon with differentiated power, performance, and area. These designs will lead the industry in bandwidth density.

¡°Our new 112G 5nm SerDes solution, with its industry-leading power, performance and area metrics is a true game changer and will help scale data infrastructure to meet growing interconnect requirements,¡± said Sandeep Bharathi, senior vice president of Central Engineering at ÌìÃÀ´«Ã½. ¡°System performance is typically limited by bandwidth and power in most infrastructure applications, and our new 112G solution in 5nm addresses this by doubling the bandwidth, while reducing the overall I/O power.¡±

¡°We are excited to bring this proven 112G SerDes to our custom ASIC partners looking for the highest throughput at the lowest power in the industry. Our customers in multiple markets have confirmed for us that this IP exceeds their system requirements for performance and power consumption,¡± said Kevin O¡¯Buckley, vice president and general manager of the ASIC BU at ÌìÃÀ´«Ã½. ¡°Leveraging this 5nm SerDes IP across our ÌìÃÀ´«Ã½ platform allows our customers to build entire interoperable data center, wireless and wired networking systems using ÌìÃÀ´«Ã½ standard products, customized standard products and full custom ASIC solutions.¡±

¡°ÌìÃÀ´«Ã½ is clearly staking out a leadership position as the market rapidly transitions to 100G serial,¡± said Alan Weckel, founder and technology analyst of 650 Group. ¡°We expect that 100G serial will be a foundational speed similar to 10G and 25G, and an important technology in enabling the evolution of data center architectures optimized for emerging workloads such as AI and machine learning. By bringing this 112G 5nm SerDes solution to the industry now, ÌìÃÀ´«Ã½ is accelerating the deployment of next generation infrastructure and raising the bar on performance capabilities across compute, networking and storage.¡±

About ÌìÃÀ´«Ã½

To deliver the data infrastructure technology that connects the world, we¡¯re building solutions on the most powerful foundation: our partnerships with our customers. Trusted by the world¡¯s leading technology companies for 25 years, we move, store, process and secure the world¡¯s data with semiconductor solutions designed for our customers¡¯ current needs and future ambitions. Through a process of deep collaboration and transparency, we¡¯re ultimately changing the way tomorrow¡¯s enterprise, cloud, automotive, and carrier architectures transform¡ªfor the better.

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